1. Introduction To VHDL

Chapter 1

1. Introduction To VHDL

VHDL has a rich and interesting history. But since knowing this history is probably not going to help you write better VHDL code, it will only be briefly mentioned here. Regarding the VHDL acronym, the V is short for yet another acronym: VHSIC or Very High-Speed Integrated Circuit. The HDL stands for Hardware Description Language.

VHDL is a true computer language with the accompanying set of syntax and usage rules. But, as opposed to higher-level computer languages, VHDL is primarily used to describe hardware. Higher-level computer languages are sequential in nature; VHDL is not.

VHDL was invented to describe hardware and in fact VHDL is a concurrent language. What this means is that, normally, VHDL instructions are all executed at the same time (concurrently), regardless of the size of your implementation.

Another way of looking at this is that higher-level computer languages are used to describe algorithms (sequential execution) and VHDL is used to describe hardware (parallel execution). This inherent difference should necessarily encourage you to re-think how you write your VHDL code. Attempts to write VHDL code with a high-level language style generally result in code that nobody understands. Moreover, the tools used to synthesize this type of code has a tendency to generate circuits that generally do not work correctly and have bugs that are nearly impossible to trace.

1.1 Golden Rules of VHDL

Rule 1: VHDL is a hardware-design language

When you are working with VHDL, you are not programming, you are 'designing hardware'. Your VHDL code should reflect this fact. It means that unless you are inside certain constructs, your code lines will be executed almost all at once. If your VHDL code appears too similar to code of a higher-level computer language, it is probably bad VHDL code.

Rule 2: Have a general concept of what your hardware should look like

Although VHDL is vastly powerful, if you do not understand basic digital constructs, you will probably be unable to generate efficient digital circuits. If you are not able to roughly envision the digital circuit you are trying to model, you will probably misuse VHDL, thus angering the VHDL gods.

1.2 Tools Needed for VHDL Development

The successful implementation of a VHDL-based system roughly calls for the following steps: VHDL code writing, compiling, simulation and synthesis. All major FPGA manufacturers have a set of software and hardware tools that you can use to perform the mentioned steps.

library IEEE;
use IEEE.std_logic_1164.all;

entity example is
  port (a, b : in std_logic; q : out std_logic);
end example;

architecture rtl of example is
begin
  q <= a and b;
end rtl;